CXL RAM Regions Being Worked On For Linux 6.3


Thanks to Intel another batch of Compute Express Link (CXL) feature code is working its way into shape for the upcoming Linux 6.3 kernel cycle.

The CXL Git tree’s for-6.3/cxl-ram-region branch has been getting ironed out in recent days by Intel engineer Dan Williams.

CXL region support is for allowing the CXL core to enumerate and provision CXL regions that are one or more CXL expanders that decode a given system-physical address range. For platform-managed CXL regions that support should already be working prior to Linux 6.3 while with this new kernel code encountering platform-managed regions these changes do allow enabling memory error handling for identifying the device(s) participating in a given interleaved memory range. For hot-added devices or other cases of non-platform-managed regions, it’s up to the OS kernel for enabling the CXL region.

With this new code also allows creating volatile-memory «RAM» regions via the /sys/bus/cxl/devices/decoderX.Y/create_ram_region where as previously the kernel only exposed /sys/bus/cxl/devices/decoderX.Y/create_pmem_region for creating persistent memory regions.

CXL RAM region commits

This CXL RAM/memory region work and other feature code is queuing up in cxl.git ahead of the Linux 6.3 merge window happening later this month. It’s great seeing Intel engineers continue to lead the work around CXL subsystem support for the upstream kernel.